What was announced

According to a report by IT之家, citing the Chinese technical press, the company Anazhixin completed the tape-out phase of the AX100 chip in October; it is presented as the world's first integrated circuit capable of solving a matrix equation in a single pass through analog computing. Tests reportedly indicate a solution time of less than 100 nanoseconds per operation, with consumption of about 80 milliwatts, in line with theoretical simulations and design expectations.

The difference compared with digital processors is architectural: the latter translate the solution into enormous quantities of iterative multiplications and additions, with a cost that grows cubically with respect to matrix size. CEO Xiang Rui summarizes the different approach by explaining that the matrix is mapped directly onto the circuit and the result is read once the circuit has self-equilibrated, without iterations.

The scientific roots and the transition to production

The project is linked to research published in October 2025 in Nature Electronics by Sun Zhong's group at the Institute of Artificial Intelligence of Peking University, which according to the material raised the precision of analog computing from the level of one hundredth to one ten-millionth. Some scholars had commented that this work had brought a long-neglected field back to life.

One year after publication, Anazhixin claims to have transferred the technology from the laboratory to the production line, using the Chinese chip production and packaging supply chain. The company also claims that the device does not depend on advanced lithographic processes and can be made with mature technologies, with a supply chain entirely controlled domestically.

The claimed tests and the limits to be clarified

The company reports having evaluated the chip in three areas. In AI model training, on an Autoencoder with 2.93 million parameters and a Transformer with 2.72 million, a second-order optimization scheme reportedly reduced update consumption by 92% and 56%, respectively. In robotics, algorithms for control and motion planning would be accelerated by between 150% and 500%, while three-dimensional reconstruction and real-time localization and mapping would gain between 200% and 500%. In wireless communications, on a 128×128 channel Gram matrix, the company speaks of equivalent capacity 20 to 207 times higher than digital ASIC circuits and GPUs, with equivalent energy efficiency 27.6 to 61.3 times better.

However, these are results reported by the company and not independently verified data. Still to be clarified are the actual precision under real operating conditions, the reproducibility of the measurements, scalability to much larger matrices, and the commercial availability of the chip. The CEO's statements about the possibility of an alternative path in the semiconductor sector are a company position, not an established outcome.

Source and attribution: this original summary was prepared by AICronaca based on the report by IT之家 ↗The statements are attributed to the source; any informational limitations: The material is based on a single technical press article that reports announcements and data provided by the company, without independent technical documentation or third-party confirmations. The performance comparisons have not been verified, and much information on timing, prices, and product availability is not provided.