The announcement and the claimed figures
Huawei presented, through the official Kirin channel as reported by IT之家, the new NPU based on the Da Vinci architecture that equips the Kirin 9050 series, described as the first τ chip with “logical folding” technology. The company claims a 140% performance increase and a 66% reduction in power consumption compared with the previous generation, but does not indicate in the material the comparison baseline or the measurement conditions. These are figures provided by the company, not independently verified.
The NPU integrates a Transformer engine, an ultra-low-power perception engine and the CANN heterogeneous computing architecture. The most significant element is the claim that it is the industry's first 30B MoE model to run directly on the device, supported by multi-level memory and compute optimization and by low-bit quantization.
Why it matters: AI without the cloud
The main novelty is not only the performance figure, but the fact that a large model can run locally: according to the source, the system operates without a connection and without waiting for the cloud. This shifts part of the processing from the data center to the device, with possible implications for latency and privacy, although the material does not quantify either aspect.
The cited features show how computing capacity is being directed toward everyday interaction: screen reading via AI, Xmage Smart Shooting 2.0 for image processing, and AI eye-tracking for turning pages and maps in screen-off mode 2.0. These are announced use cases, not results of independent tests.
Context and open questions
The announcement connects to what was stated in October during the Kirin 2026 media event: Xu Songyu, head of product management for wireless terminal chips in Huawei's semiconductor division, called the Kirin 9050 series the first τ chip with logical folding, capable of opening a new decade. A slide reported by the source indicates the goal of exceeding 5 GHz for P-core frequency by 2031: this is a long-term prospect, not a specification of the current product.
Several points that the material does not address remain to be clarified: which devices will be the first to carry the chip, with what availability and price, how the 30B model performs in terms of memory occupied and actual speed, and whether the performance and power consumption figures are measured using comparable parameters. Until then, the figures should be considered manufacturer claims, reported by the source and not yet verified.
